How to simulate setup time and hold time of any DFF in cadence tool

Setup time is defined as the minimum amount of time before the clock's active edge that the data must be stable for it to be latched correctly. Any violation may cause incorrect data to be captured, which is known as setup violation.

Hold time is defined as the minimum amount of time after the clock's active edge during which data must be stable. A violation in this case may cause incorrect data to be latched, which is known as a hold violation. Note that setup and hold time is measured with respect to the active clock edge only.

Many fresh engineers know the definition but they don't know how to simulate them. I wrote a tutorial summarizing previous works coming from excellent engineers. 

The tutorial discussed how to simulate the setup time and hold time of a DFF.