The histogram test method is to apply slow linear ramp to the ADC and derives the DNL and INL directly from a total number of occurrences of each code at the output of the ADC.
How is the ramp slope? And how many points do we need for each digital code?
For example, if the ADC sampling rate is 1MHz. So every 1us we can get one sample. The LSB is 1mV. It has a 10-bit resolution.
To get 0.01LSB measurement resolution, we need 100 samples/code.
The total simulation time is 1us * 100 * 2^10=102.4 ms.
The ramp slope is 10uV/us.
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