Publication Title: A_Wide_Range_42_psrms_Precision_CMOS_TDC_With_Cyclic_Interpolators_Based_on_Switched-Frequency_Ring_Oscillators
The publication obtained a 327us measurement range with a main reference clock counter and two interpolators. The design method is based on Nutt interpolation.
The introduction was excellent to teach us to learn about the TDC background. Although TDCs are used in ADPLLs as a phase detector, the paper focused on its another application: time-of-flight applications. That means the wide-range TDC is used to measure distance with a few hundred kHz clock rate.
Personally, I really like the rest of the introduction to discuss different types of TDC. Flash type TDCs using delay lines or ring oscillators have a nonlinearity issue caused by the delay mismatch and threshold mismatch. The vernier delay line improves the TDC resolution by subtracting two delay values. However, for the same measurement range, the vernier delay TDCs need longer delay units than the flash type TDCs. And also the random jitter increases as the delay line increases. Both of them is sensitive to PVT variations.
The third type of TDC is gated ring oscillator type. It provides a 1st order noise shaping. Without reseting for every step quantization, the current phase information is retained for next quantization cycle. After differentiation, the phase error or quantization error is noise-shaped.
In addition, the pipeline, cyclic, SAR TDCs are designed with a time difference amplifiers. However, the dynamic range of them is limited.
In sum, all these TDCs can be divided to short-range and long-range. Short range TDCs could get higher resolution. However, counter-based TDCs for long range measurements needs a fast clock to obtain a good resolution.
Thus, the paper proposed a combination method (Nutt interpolation) of using a main-counter TDC dealing with long range measurement and using high resolution TDCs to measure the interpolator range. So this type of TDC can achieve both high range and high resolution.
The advantages:
1. High range + high resolution
2. The input signal is asynchronous with respect to the reference clock so the linearity of the TDC can be improved by asynchronous input scrambles all the interpolators errors.
The major design discussion of the publication focused on the ring-oscillator TDC with two frequencies to amplifier the time residue, which is called switch-frequency ring oscillator. Furthermore, a digital calibration method is introduced for radix extraction.
Two points are good to know:
1. Real circuit needs a input generator block to generate the start and stop signals
2. DFF metastability issue could happen when start/stop edge coincide with the reference clock edge. Two DFFs are used to relieve the metastability.
3. The interpolator nonlinearity doesn't mean the whole TDC is nonlinear. The static nonlinearity of the TDC depends on the relation between the reference clock and the start signal.
By asicedu.com
