Recommended operational amplifier (opamp) reference books

 Design of Low-Voltage Low-Power Operational Amplifier Cells

- Written by Ron Hogervost and Johan Huijsing

Introduction to CMOS Opamps and Comparators

- Written by Roubik Gregorian

Operational Amplifiers -Theory and Design 

- Written by Johan H. Huijsing

Analog Integrated Circuit Design 

- Written by David Johns and Ken Martin

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Wide Dynamic Range TDC 2015-TCASII Paper 8/2020

Publication Title: A_Wide_Range_42_psrms_Precision_CMOS_TDC_With_Cyclic_Interpolators_Based_on_Switched-Frequency_Ring_Oscillators

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The publication obtained a 327us measurement range with a main reference clock counter and two interpolators. The design method is based on Nutt interpolation.

The introduction was excellent to teach us to learn about the TDC background. Although TDCs are used in ADPLLs as a phase detector, the paper focused on its another application: time-of-flight applications. That means the wide-range TDC is used to measure distance with a few hundred kHz clock rate.

Personally, I really like the rest of the introduction to discuss different types of TDC. Flash type TDCs using delay lines or ring oscillators have a nonlinearity issue caused by the delay mismatch and threshold mismatch. The vernier delay line improves the TDC resolution by subtracting two delay values. However, for the same measurement range, the vernier delay TDCs need longer delay units than the flash type TDCs. And also the random jitter increases as the delay line increases. Both of them is sensitive to PVT variations.

The third type of TDC is gated ring oscillator type. It provides a 1st order noise shaping. Without reseting for every step quantization, the current phase information is retained for next quantization cycle. After differentiation, the phase error or quantization error is noise-shaped.

In addition, the pipeline, cyclic, SAR TDCs are designed with a time difference amplifiers. However, the dynamic range of them is limited.

In sum, all these TDCs can be divided to short-range and long-range. Short range TDCs could get higher resolution. However, counter-based TDCs for long range measurements needs a fast clock to obtain a good resolution.

Thus, the paper proposed a combination method (Nutt interpolation) of using a main-counter TDC dealing with long range measurement and using high resolution TDCs to measure the interpolator range. So this type of TDC can achieve both high range and high resolution.

The advantages:
1. High range + high resolution
2. The input signal is asynchronous with respect to the reference clock so the linearity of the TDC can be improved by asynchronous input scrambles all the interpolators errors.

The major design discussion of the publication focused on the ring-oscillator TDC with two frequencies to amplifier the time residue, which is called switch-frequency ring oscillator. Furthermore, a digital calibration method is introduced for radix extraction.

Two points are good to know:
1. Real circuit needs a input generator block to generate the start and stop signals
2. DFF metastability issue could happen when start/stop edge coincide with the reference clock edge. Two DFFs are used to relieve the metastability.
3. The interpolator nonlinearity doesn't mean the whole TDC is nonlinear. The static nonlinearity of the TDC depends on the relation between the reference clock and the start signal.

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By asicedu.com

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RMS to Peak-to-Peak Jitter conversion

To converter between RMS and peak-to-peak random jitter, the bit-error-rate (BER) must be specified.

 

$Jitter_{P-P}=\alpha \times Jitter_{RMS}$

where $\alpha$ is determined by $\frac{1}{2}erfc(\frac{\alpha}{2\sqrt{2}})=BER$

The following table is to depict the scaling factor for different BER.

If some one wants to save a copy of the table to his or her personal computer, please click the link to download: google sheet link.

RMS noise value of comparator

The comparator offset is mean value of output normal distribution. RMS noise value is the one standard deviation of the normal distribution.

For an error rate $10^{-12}$, the input must exceed the input offset by up and down $\alpha/2$ times the RMS noise level. For example, the offset of an comparator is $3mV$. The RMS noise is $1mV$, so the high output logic level the required input voltage is $3mV + 14.069 /2 \times 1mV = 10mV$. For the low output logic level, the input must be below $-4mV$.

 

TechPaper - ANALOG IC TECHNOLOGIES FOR FUTURE WIRELESS SYSTEMS WRITTEN BY Dr. MATSUZAWA

TechPaper Series :
ANALOG IC TECHNOLOGIES FOR FUTURE WIRELESS SYSTEMS WRITTEN BY Dr. MATSUZAWA

- SNR estimation in a differential Sample and Hold circuit

SNR decreases with a decrease in signal amplitude. A larger sampling capacitance is needed to keep the same SNR at the low operating voltage. However, it results in an increase in power consumption or decrease of the signal bandwidth. Therefore, the rise of signal bandwidth with moderate SNR is promising. The increase of SNR is becoming quite tough. This issue exists now common in almost all analog circuits, like ADCs, filters, and VCOs. 

PSRR comparison in different ADC architecture

Three main ADC architecture: pipeline, SAR, sigma-delta.

Among them, pipeline ADCs are the most sensitive to power supply noise because they have the lowest power supply rejection ratio. They are followed by SAR ADCs, with sigma-delta ADCs being the least sensitive to noise on the power supply.

Noise discussion in circuit

Three main noise mechanisms are attracted most of the attention: shot, flicker, thermal noise.

The figure helps explain a lot. Thermal noise is generated by the thermal agitation of the charge carriers inside an electrical conductor at equilibrium, which happens regardless of any applied voltage (Wikipedia). In other words, a low-temperature environment could reduce the thermal noise in the circuit. So some sensitive electronic equipment such as radio telescope receivers are cooled to cryogenic temperatures to reduce thermal noise in their circuits. Thermal noise in an ideal resistor is approximately white, meaning that the power spectral density is nearly constant throughout the frequency spectrum. When limited to a finite bandwidth, thermal noise has a nearly Gaussian amplitude distribution. The valuable kT/C noise consideration is also caused by the switching resistor instead of the sampling capacitor because there is no ideal switch without on-resistance.

Short noise or Poisson noise is a type of electronic noise which can be modeled by a Poisson process (Review 6 common probability distributions). For CMOS imager design, short noise needs to be concerned, because it is associated with the particle nature of light. 

Photon noise simulation. The number of photons is increased from left to right and from top to bottom. 

Flicker noise, 1/f noise, or pink noise, is a type of electronic noise with a 1/f power spectral density. Flicker noise is often characterized by the corner frequency fc between the region dominated by the low-frequency flicker noise and the higher-frequency flat band noise. MOSFETs have a higher fc than JFETs or bipolar transistors, which is usually below 2kHz for the later.