Wednesday, January 16, 2019

Tips to use cadence environment in Linux/Unix system

Make Nautilus (file manager) behave like a browser

Nautilus is the default file manager on the lab computers. You have likely noticed that, with the default settings, it spawns a new windows each time you open a folder. If you find this annoying, you can change its behavior with the following steps:
  • Open the preferences dialogue (Edit->Preferences)
  • Click on the behavior tab
  • Tick the always open in browser windows option

Firefox profile lock (error message with "Firefox is currently running...")


Frequently, if you do not close firefox properly, it will give an error message next time you try to open it. To fix this problem, navigate to ~/.mozilla/firefox and look for a folder with a mix of numbers and letters followed by "Default User". In this folder, you will find an invisible file called .parentlock; delete this file and the problem should be fixed.

Locked Files in Cadence

If you try to open an old file and Cadence says you can't edit the file, it is because this file has become "locked." This usually happens as a result of Cadence crashing while the file was open.
To unlock the file, you need to search for and remove (using the rm command) a file that ends in ".cdslck". You will often have to look through directories and subdirectories to find this file, but look in directories that have the same name as the cellview in question. For example if you are having trouble opening the schematic in cellview "Inverter" in library "myLib" then you would go to the folder myLib/Inverter/ and look for all files ending in ".cdslck".
As an alternative to manually searching through the directories you can use the command (from the directory where you start cadence):
find . -name "*.cdslck"
Before you run this command close all open shcematics and layouts. Then simply remove all files that appear.
To remove all cdslck files, you can use the command rm together with searching(from the directory where you start cadence):
find . -name "*.cdslck" -exec rm -f {} \;

Reference: https://secure.engr.oregonstate.edu/wiki/ams/index.php/Cadence/TipsAndTricks#toc11

Set # of sig figs on schematic annotation

Sometimes the number of significant figures on schematic annotations (node voltages, for example) is very high and it becomes difficult to read. To fix this, type the following into the icfb window:
envSetVal("auCore.misc" "labelDigits" 'int 5)
Change the number 5 to your desired number of sig figs. To make this change permanent, add the line to your ~/.cdsenv file.


Set the default script/veriogA editor in Cadence to gedit

  • Option 1: type the following in CIW command line
editor="gedit"
  • Option 2: add the line to .cdsinit
editor="gedit"


Change Waveform Graph windows default settings

Add some of the following lines to .cdsenv file to change the window size, background/foreground color, font size, line thickness,and etc.
;width
viva.graphFrame width string "900"
;height
viva.graphFrame height string "700"
;background color
viva.rectGraph background string "white"
;foreground color
viva.rectGraph foreground string "black"
;axis font
viva.axis font string "Fixed [Misc],14,-1,5,50,0,0,0,0,0"
;marker font
viva.pointMarker font string "Fixed [Misc],14,-1,5,50,0,0,0,0,0"
viva.horizMarker font string "Fixed [Misc],14,-1,5,50,0,0,0,0,0"
viva.vertMarker font string "Fixed [Misc],14,-1,5,50,0,0,0,0,0"
viva.multiDeltaMarker font string "Fixed [Misc],14,-1,5,50,0,0,0,0,0"
viva.refPointMarker font string "Fixed [Misc],14,-1,5,50,0,0,0,0,0"
;line thickness
viva.trace lineThickness string "thick"
You may also use envSetVal to set the environment. For example, to set the background to white, type the following in the CIW window.

envSetVal(“viva.rectGraph” “background” 'string “white”)

Save operating point information over a DC sweep

You may notice that DC operating point information (gm, gds, etc.) does not get saved over a DC sweep. One way to work around this is to replicate the sweep using the parametric sweep tool. In some cases, however, this may constrain your simulation setup. If you simply want the op information to be saved for every point in a sweep, follow these directions:
  • Make a new text file (saveop.scs, for example) in a directory to which you have read-write access.
  • Add the following line to the file, replacing N0 with the name of the device whos operating point you wish to save:
save N0:oppoint

  • Save the file. Return to your ADE window, navigate to Setup->Model Libraries; now the file you just made to the list.
  • Run your simulation and find the saved data in the Results Browser (under the Tools menu in the ADE). You can also access the data with equations (i.e. getData("M0:vdsat" ?result 'dc)).
  • You can, of course, have multiple lines in the file for multiple devices. For large simulations, consider saving disk space by modifying the file to save only the parameters of interest (i.e, N0:gm). More information about the save command can be found in the spectre documentation or by running spectre -h save at the terminal.

Thursday, January 10, 2019

Calculate Copper resistance related to its thickness

Bypass capacitor's purpose

Those on-board ICs with high-speed demand sharp spikes of transient current that the power supply cannot deliver. Power supplies are designed to supply a level amount of power across the entire board, rather than short bursts. To solve this issue, a bypass capacitor can be placed near the IC to supply the required current for these quick spikes. A bypass capacitor does this by storing power and then discharging it to the IC when it requires excess current. This gives the power supply time to respond. Following the spike, the bypass capacitor is recharged and ready for the next cycle.

Bypass capacitors are also important for reducing the ground bounce that comes from digital devices that have faster switching times. Bypass capacitors are also used to filter the low-frequency noise caused by the power supply and are helpful with other signal integrity and EMI issues as well.

How many bypass capacitor needed?

The number of bypass capacitors needed for design will depend in relation to the parts that they are assigned to, and how many of those parts are being used. Bulk capacitors in the 10uF range are usually for each voltage drop on the board. They should be positioned where the voltage is developed or where it enters the board. On some devices, they are used in conjunction with high-speed bypass capacitors.

In general, at least one high-speed bypass capacitors in the 0.1uF range should be placed by each IC. They should be placed as close as possible to their respective IC to supply current immediately. I recommend that devices with multiple power pins should have at least one bypass capacitor for each power pin. Although this will use up more board space, it can significantly help to reduce ground bounce.

The high-speed bypass capacitor can be underneath the device on the opposite side of the board, or just off the pins that the bypass capacitor is connected to on the same side of the board.

For circuits requiring multiple bypass capacitors placed near the power pin of a specific device, the capacitors should be placed next to that pin in ascending order of value. For instance, if both a 0.01uF and a 10uF capacitor are specified for a specific device, place the 0.01uF closest to the device with the 10uF outboard of that. In this way, the larger bulk capacitor will recharge the high-frequency capacitor that is closest to the device pin.

When routing a bypass capacitor, you should start from the power or ground pin of the device and go directly to the capacitor pin. From there the route can continue on a via connecting it to the power or ground plane. You should also use a short and wide traces as possible to connect the bypass capacitor, and use as many vias to connect to the power or ground plane as possible.


Thursday, December 13, 2018

Transfer Altium Design schematic and pcb layout to KiCAD version

Sometimes you don't have license of Altium but you need to review the Altium PCB design. There is a good solution for you to use open-source PCB tool, KiCAD.

But you need to use visit the external tools in KiCAD web and download the altium2kicad one.

Clone or download the package of altium2kicad tool.

Create a new folder: tutorial. Put all the altium2kicad files into tutorial folder.


Install a perl tool: strawberry perl for windows.

Put those altium schematic and layout files into the tutorial folder.




Right click to run the perl script "unpack.pl" and then it unpacks .PcbDoc and .SchDoc files into sub-directories.


Right click to run the perl script "convertschema.pl" to convert .SchDoc to .sch which is readable by KiCAD.



Right click to run the perl script "convertpcb.pl" to convert .PcbDoc to .kicad_pcb which is also readable by KiCAD.

Now the transfer operation is done. You can launch KiCAD and click Browse --> open local File...
Open the .sch or .kicad_pcb files.


Don't delete -cache.lib files which provides lib details for the design.





Thursday, December 6, 2018

ADC basics

The McGill Physiology Virtual Lab provides a good post talking about some basics of Analog-to-digital converters including sampling, resolution, saturation, sampling rate and aliasing, etc.

Tutorial about pipelined adc design

Pipelined ADCs are common used for high-speed high-resolution data acquisition. Dr. Imran Ahmed posted a good tutorial to briefly talk about 1.5bit/stage pipelined adc design as well as addressing some key tradeoffs.